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I will attend IEEE Energy Conversion Congress & Exhibition Conference 2010 at Atlanta next september 12-16. If you happen to be there too, I’d be pleased to meet you at booth #208 !

System level design is in the air. This is also true for motor control applications.

Up to now, this blog has mainly focused on commenting third-party articles relating to FPGA as a chip for embedded system development in power electronics applications, mostly for motor control. Unfortunately, most of those third-party articles have been written with an ”old” chip thinking comparing FPGA solely as another alternative to COTS DSP and MCUs. From a certain point of view this is completely understandable: those articles have been written by motor control people who have been using DSP since the last 15 years. Since the 90s, digital motor control embedded system design has been roughly the following: buy a DSP chip + plug it with other components on a PCB + program the DSP + plug your motor and check how is the motor running. Why it shouldn’t be the same with FPGAs in 2010 ?

The reason is because FPGAs are not a chip anymore: they are a platform. I am not inventing this, this is a reality. Xilinx’s CEO Moshe Gavrielov speaks about it, Altera’s CEO John Daane speaks about it specifically for Motor Control applications and so does Actel’s CEO John East.

What does this new kind of approach mean for motor control system applications ? The major shift here for motor control system design is not the semiconductor technology (FPGA) itself but the new level of component integration. I like to compare this shift to the one that happened in personnal computing: why smartphone are currently replacing PC ?

On a component-to-component basis, it is true that my iPhone screen is not as convenient as my desktop screen, the email management software is not comparable to most desktop email management and the internet connection may not be as fast as a real cable internet connection. So if it is less perfomant, why does this happen ? This is not a question of performance, it’s a question of form factor. And this form factor enables you to do new things  (with very high added-value) that were not possible on the former platform: like taking a photo and share it over internet from almost everywhere on the planet within 10 seconds. This is how Apple promotes its iPhone platform everywhere through the infinite uses of iPhone apps.

Is this situation comparable to FPGA-as-a-platform and its ecosystem of IP Cores (”apps”) ? In my opinion, it is:

In this new motor control embedded system design scheme, what was formerly a (PCB-integrated) motor control IC  is now being replaced by a (FPGA-integrated) motor control IP (this is also true for other system-level IC such as image processing IC - see the excellent article of Kevin Morris - Paint-by-number ASSP ). Hence the question : what new things that a motor control IP can provide in motor control system applications over motor control IC ? Many of them are already mentionned in this Alizem Motor Control IP for Home Appliance applications white paper such as using reconfigurability of hardware to develop custom energy-optimal PWM.  Here are some others :

There’s is no doubt: there’s a worldwide growth to be expected in the coming years for power electronics applications: solar power, electric vehicule, smart-grid enabled industrial motor drive, etc.. But all this is going to happen in a business environment where great pressure is put on higher performance and reliability and lower costs and time-to-market. In those conditions, the FPGA plaform + Motor Control IP approach is certainly an option to consider to resolve those diverging constraints.

Pursuing with the “iPhone” analogy and considering IP as “apps” running on a FPGA platform, it is tempting to ask : will Altera, Xilinx and Actel - with their own IP ecology (”iStore”) - become the next ‘Apple’ of semiconductor space ? I look forward to hear the keynote “Future of FPGA Executive RoundTable: Key Element in your Design Future” tomorrow at the FPGA Virtual Summit.

According to this EEtimes article, the Association of Home Appliance Manufacturers (AHAM) took the opportunity of being at the United Nations Climate Change Conference in Copenhagen to release a very well written 25 pages document titled “The Home Appliance Industry’s Principles & Requirements for Achieving a Widely Accepted Smart Grid“. In this document, the AHAM - based on its unique perspective to the Smart Grid Vision -  is intended to provide three essential requirements for the Smart Grid’s interaction with consumers in order for the Smart Grid to be successful. Among those three requirements, the second one is the most interesting from a technological (embedded systems) perspective :

Communication Standards must be open, flexible, secure, and limited in number

This requirements then splits in four requirements : open, flexible, secure and limited in number.

From a FPGA perspective, flexible sounds very familiar because its embedded in the name of the technology itself : Field-Programmable. But is this flexibility may solve problems and help the development of Smart Grid enabled homes ? According to the authors,

“Smart Grid enabled homes will have varying levels of sophistication, depending on the type of appliances, devices, and networks that are installed. There are many configurations, combinations, and options for energy management inside the home. Some possibilities could include a simple email notice for a manual demand response by the consumer, a smart meter directly communicating with a specific appliance to ask it to turn on and off, or a meter communicating with a Programmable Communicating Thermostat allowing for temperature adjustment.”

From now to the moment that every appliance is going to talk the same language - even with such standardization, that is limited to the US only - one can think that this is going to be long and costly. This process has been started since a long time on industrial side (with many types of protocols) and there is still no single communication standard. Altera and Xilinx are actually taking advantage of this massive willingness to connect but protocol-segmented environment. Their programmable chip solutions enables them to sell a platform on which industrial equipment manufacturers can then use to build their own platform which is going to be finally customized with a regional/market-specific set of IP blocks. This approach enables flexibility while also reducing costs and time to market.

Is the same idea is going to happen in Home Appliance space ? As we all know, this high-volume market is very focused on costs. Not considering smart grid, a chip to chip price analysis would probably give only small chances to FPGAs. But considering that :

- according to a recent Whirlpool survey, 84% of consumers choose energy - not water or time – as most important when it comes to home appliance efficiency, and that

- according to Electric Power Research Institute, the implementation of Smart Grid technologies could reduce electricity use by more than 4 percent by 2030 providing a mean savings of $20.4 billion for businesses and consumers,

… there may have an opportunity there for FPGA chip manufacturers. Among the most important ones, Altera is already there.

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While this may not be the exact case of typical power electronics system designers (who mostly design by integrating off-the-shelf MCU and DSP chips), this article written by Geoffrey James is giving a good picture of the current state of FPGA technology and design tools for SoC design :

Trend #1: Today’s FPGAs are gaining features appropriate for SoCs.

Trend #2: The FPGA tool sets are becoming more sophisticated.

Trend #3: SoCs are proliferating into a wider range of products.

Trend #4: Converting from FPGA to ASIC is constantly getting easier.

This may give a hint to typical power electronics system designers who are mostly not familiar with FPGA technology.

Here’s a very extensive article written in two parts (part 1 here, part 2 here) by John Smitty of Actel Corporation.

According to Smitty, “the potential energy savings are staggering. Over 40 million electric motors are used in manufacturing operations in the United States alone. Electric motors account for 65 to 70 percent of industrial electrical energy consumption and approximately 57 percent of all electrical consumption worldwide. Saving even a few percent of the world’s estimated 16,000-plus terawatt-hours (TWh) annual consumption of electricity amounts to several hundreds of trillions of watt-hours per year.”

High-performance motor control design is one way to achieve those energy savings and this may be done using DSP chips but those rapidly limited because “they are sequential state machines that can only do a very limited amount of computation in a single clock cycle“. Here’s how the author explains why mixed-signal FPGAs can overcome this situation:

“Unlike DSPs, the mixed-signal FPGA can do many computations in parallel, and can do certain specialized computations such as computing sines and cosines (which are generally required by these algorithms) much faster than most any DSP microcontroller, at a lower cost per computation. As a bonus, FPGAs invariably consume less power than any type of microcontroller doing the same function“.

Also, “FPGAs offer much flexibility. For instance, if your algorithm requires an extra PWM, it can easily be added to an FPGA solution. PWMs pre-built into a DSP or ASSP integrated circuit may or may not perform the PWM algorithm you want, or take into consideration the needs of your power circuitry. With an FPGA, the PWM can be customized exactly to your specifications. An FPGA can be adapted to accept most any type of feedback sensor (encoder, Hall effect, or tachometer, for example) or a sensorless algorithm based upon motor back-EMF measurements can be implemented“.

Here’s a recent article written by Greg Crouch, Embedded Systems Business Director at National Instrument., on the topic of FPGA-based motor control for Factory Automation.

Embedded-machine builder EUROelectronics reduced power use with FPGA-based field-oriented control (Source : National Instruments)

“FPGA-based algorithm control delivers better efficiency than microprocessors can achieve. A wide range of control-system algorithms are available, including trapezoidal, sinusoidal and field-oriented.

Trapezoidal, or six-step, control is the simplest but lowest-performance method. For each of the six commutation steps, the motor drive provides a current path between two windings while leaving the third motor phase disconnected. However, torque ripple causes vibration, noise, mechanical wear and greatly reduced servo performance.

Sinusoidal control, also known as voltage-over-frequency commutation, addresses many of these issues. A sinusoidal controller drives the three motor windings with currents that vary smoothly. This eliminates torque ripple issues and offers smooth rotation. ”

More information on NI CompactRIO can be found directly on their website.

Here’s a recent brochure from Altera on Motor control solution in industrial space.

“While microcontrollers and DSP devices may be well suited to certain aspects of motor control systems, they lack flexibility to support motor control IP and interfaces in hard logic. With our Cyclone® III FPGA, you can integrate processors, digital logic interfaces, DSP functions, motor control IP and multiple Industrial Ethernet protocols into one device, reducing board size and complexity. Operating across industrial communication networks, motion control solutions with drive-controlled motors can be very energy efficient. Aside from saving power, this can also lead to net cost savings in the long run.”

 Source: Altera 

It may be important to mention that this type of system architecture in industrial space - with industrial ethernet connection - is “smart-grid” ready, i.e. information is going in two direction : to the motor drive system for motor control and from the motor drive system for condition-monitoring purposes.

In that latter case, the motor drive system may become a “broadcaster” of useful information to the main control system if the Motor Control IP contains fault-detection and diagnosis algorithms that are running simulataneously with torque and speed control algorithms.

I am just arriving from attending OPAL-RT’s RealTime 2009 Conference held in Montreal from August 30th-September 2th. People from all around the world gathered to this conference to share experience using OPAL-RT RealTime Simulators, to give new perspectives of this technology or simply to learn more about this kind of products. Many industries/applications were represented : power systems, aerospace, automotive, industrial motor drives, wind turbines, etc. To know more about OPAL-RT technology, please read one of my previous post .

Source : OPAL-RT

On the picture above (click to enlarge), Philippe Venne from OPAL-RT (on the right side) is presenting a real time simulation demontration of a 17 wind turbine wind farm to Frédéric Colas from Université de Lille (France). The experiment running on the picture (from the simulator located on the left side of the screen) is a short-circuit from phase A to ground at the point of connection of the farm on the network. The graphs on the left are the voltages and currents at the point of connection; the graph on the top right is the torque of the wind turbine rotor during the fault. Finally, the graph on the bottom right is the DC bus voltage during the fault.

Many other hand-on demonstration were presented on various topic of applications. It looks very promising for RealTime 2010 conference.

Here’s a very small article from Acromag positionning its FPGA products toward smart-grid and Wind Turbine Control applications.

 ”The basic components of a control system to maximize energy capture from a wind turbine include: rotor pointing, blade speed regulation, minimization of pointing and pitch control, and the mitigation of disturbances (i.e. excessive rotor speed, wind gusts, etc.). Additionally, the environment inside the rotor head, or nacelle, is very hostile. Any control device used in this environment must be self-diagnostic, rebootable, extreme temperature tolerant, vibration tolerant, and of course, affordable.”