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	<title>Comments for PE-FPGA.com</title>
	<link>http://www.pe-fpga.com</link>
	<description>FPGA Technology in Power Electronics Applications</description>
	<pubDate>Tue, 07 Sep 2010 05:11:10 +0000</pubDate>
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		<title>Comment on Motor Control IC vs Motor Control IP by Marc Perron</title>
		<link>http://www.pe-fpga.com/?p=36#comment-823</link>
		<author>Marc Perron</author>
		<pubDate>Tue, 24 Aug 2010 23:31:11 +0000</pubDate>
		<guid>http://www.pe-fpga.com/?p=36#comment-823</guid>
		<description>The iPhone + Apps analogy has been recently cited (using 'iPads istead of iPhone) by a financial analyst:

"When a designer uses standard silicon, say, something from Intel, there is little differentiation and product gross margin for the customer is 10% to 15%. If the designer can do something really unique and different, and the product has a capability that doesn't look like anybody else's, the company gets a much higher margin. Think of the iPad, as an example. You can differentiate an electronics product through software or semiconductors. Communications, industrial, military equipment companies, for example, need custom silicon. The old form of customizing silicon was an ASIC, which stands for "application-specific IC." The customer would go to the ASIC vendor and say, "Could you design this function for me?" The ASIC supplier would charge the customer a design cost and charge per unit. Altera's product, the PLD, is flexible. A designer can program it any way he needs, but it is much bigger and the unit cost is higher than an ASIC. What has happened is the ASIC vendor got stuck in old technology. ASIC vendors didn't have the volume to build a new mega fab, and the design goes up exponentially every generation. Now the industry has reached a tipping point, where Altera's product is not only easier to design, there is virtually no cost penalty per unit. The customer doesn't have to pay for tooling. The programmable logic market is about $6 billion, and ASICs market is about $25 billion. There now is evidence that PLDs are cannibalizing the ASIC market, so investors are benefitting from increased communication infrastructure spending, strong industrial demand and a powerful replacement cycle"

Source:

http://bit.ly/apT3Yh</description>
		<content:encoded><![CDATA[<p>The iPhone + Apps analogy has been recently cited (using &#8216;iPads istead of iPhone) by a financial analyst:</p>
<p>&#8220;When a designer uses standard silicon, say, something from Intel, there is little differentiation and product gross margin for the customer is 10% to 15%. If the designer can do something really unique and different, and the product has a capability that doesn&#8217;t look like anybody else&#8217;s, the company gets a much higher margin. Think of the iPad, as an example. You can differentiate an electronics product through software or semiconductors. Communications, industrial, military equipment companies, for example, need custom silicon. The old form of customizing silicon was an ASIC, which stands for &#8220;application-specific IC.&#8221; The customer would go to the ASIC vendor and say, &#8220;Could you design this function for me?&#8221; The ASIC supplier would charge the customer a design cost and charge per unit. Altera&#8217;s product, the PLD, is flexible. A designer can program it any way he needs, but it is much bigger and the unit cost is higher than an ASIC. What has happened is the ASIC vendor got stuck in old technology. ASIC vendors didn&#8217;t have the volume to build a new mega fab, and the design goes up exponentially every generation. Now the industry has reached a tipping point, where Altera&#8217;s product is not only easier to design, there is virtually no cost penalty per unit. The customer doesn&#8217;t have to pay for tooling. The programmable logic market is about $6 billion, and ASICs market is about $25 billion. There now is evidence that PLDs are cannibalizing the ASIC market, so investors are benefitting from increased communication infrastructure spending, strong industrial demand and a powerful replacement cycle&#8221;</p>
<p>Source:</p>
<p><a href="http://bit.ly/apT3Yh" rel="nofollow">http://bit.ly/apT3Yh</a></p>
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		<title>Comment on Motor Control IC vs Motor Control IP by Marc Perron</title>
		<link>http://www.pe-fpga.com/?p=36#comment-449</link>
		<author>Marc Perron</author>
		<pubDate>Tue, 13 Apr 2010 20:59:33 +0000</pubDate>
		<guid>http://www.pe-fpga.com/?p=36#comment-449</guid>
		<description>This article is now referenced by the 'industry expert' section of Design &#38; Reuse website :

http://www.design-reuse.com/industryexpertblogs/22976/motor-control-ic-vs-motor-control-ip-marc-perron.html</description>
		<content:encoded><![CDATA[<p>This article is now referenced by the &#8216;industry expert&#8217; section of Design &amp; Reuse website :</p>
<p><a href="http://www.design-reuse.com/industryexpertblogs/22976/motor-control-ic-vs-motor-control-ip-marc-perron.html" rel="nofollow">http://www.design-reuse.com/industryexpertblogs/22976/motor-control-ic-vs-motor-control-ip-marc-perron.html</a></p>
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