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FPGA Technology in Power Electronics Applications

OPAL-RT and Real-Time Simulation of Electric Motor Drives

FPGA technology in power electronics application is not only a matter of glue logic or system-on-a-chip platform but is also a matter of high-performance computing for real-time simulators of electric motor drives and any dynamic systems.

The use of FPGA in high-performance computing is not new: many applications have benefitted of the accelerated computing capabilities of those devices enabled by their parallelism capabilities, such as DNA sequencing and financial services. Since power electronics applications are typical fast-dynamic, complex and non-linear application, there might have a natural interest there to exploit accelerated computing platforms to simulate those systems in real-time.

This is exactly what OPAL-RT, a Montreal-based company, is doing : FPGA-based real-time simulators for power electronics applications. Their products enable system designers to quickly, safely and cheaply test their designs on a virtual plant. A typical example would be a PMSM-based system motor control designers that want to test his algorithms on many size of motors (2kW-5kW-15 kW) without having to plug its controller on a “real” motor : this designer can then plug its controller on a OPAL-RT “virtual” motor and test its motor control algorithm at a very early stage in its project (before having the real system protype available for example). The model of those “virtual” motors can be based on standard analytical equations or based on JMAG finite element analysis.

This type of technology opens a very broad range of new possibilities in the design of power electronics systems.

Altera FPGA for Solar Power Inverter applications

An Altera variation on the last post is presented here. This article is based on the work of students from Yuan Ze University in Taiwan.

Solar energy is becoming increasingly attractive as we grapple with global climate changes. However, while solar energy is free, non-polluting, and inexhaustible, solar panels are traditionally fixed. As such, they cannot take advantage of maximum sunlight as weather conditions and seasons change. This article describes an FPGA- and embedded processor-based system-on-a-chip (SOC) implementation of a prototypical solar-tracking electricity generation system that improves the efficiency of solar panels by allowing them to align with the sun’s movements.”

Xilinx FPGA for Solar Power Inverter applications

Many factors are currently pushing toward a technolgy-shift in power generation management :

- expected long-term increase of energy prices

- increase of green regulations such as the Kyoto protocol

- public pressure and customer awareness toward clean energy

- decrease of cheap oil ressources

- increase of world population and increase of the quality of life

- smart grid, etc… 

It is well known that flexible-hardware characteristics of FPGAs is giving more freedom to designers to push their designs to the limits of their applications, hence generating or delivering a maximum amount of Watts in an enhanced system operating range. This is what a team of Jamshedpur, India, attempted to do in recent works on Solar Power inverter applications presented in this article :

In the present study, the Pulse width modulated (PWM) adaptive intelligent Power converter (inverter) has been designed and developed where the input DC power stored in the battery bank obtained through PV and/or Grid sources, has been digitized to produce a sequence of PWM pulses (approximate to a sine wave) at the output of power converter and deliver power to the load.”

Altera FPGA and Energy-Efficient Motor Control IP

Here’s a recent article published in Industrial Embedded Systems magazine on the topic of using FPGA to increase flexibility of design, power savings are costs reduction. The article has been written by Jason Chiang, Sr. Technical Marketing Manager Industrial Business Unit, Altera Corporation.

This article has a couple of interesting points regarding the use of Motor Control IP to reduce overall system costs (which is certainly a disadvantage of FPGA chips being more expensive than traditionnal MCU/DSP chips) :

Motor control IP is designed to provide a very high-performance interchangeable platform. The practical motor control IP for an application is achieved by selecting and integrating the right combination of IP. FPGAs are flexible and can support many types of communications protocols, motor control IP, and industrial I/O interfaces on one device or platform.

Another advantage of implementing the motor control IP (and network connectivity) on the FPGA is that it mitigates the risk of product obsolescence. With long product life cycles, FPGAs are built with industrial longevity, system flexibility, and reliability in mind. Designers can modify their systems or migrate to new generations of FPGAs with ease. Contrast this methodology to MCUs or DSPs, which require intensive software resources and involve long development cycles when moving to a new processor architecture to update any hardware features.”

Actel Mixed-signal FPGA introduction for Motor Control

Here’s an interesting online tutorial presented by the famous Clive ‘Max’ Maxfield introducing Actel Fusion mixed-signal FPGA and how they can useful for Motor Control applications. A general introduction on FPGAs is presented for people that aren’t familiar with this type of technology (which typically the case for motor control system designers).

Hurry up : this tutorial is only available until August 15th 2009 !

Actel Fusion FPGA and Motor Control

Here is an interesting article from Kevin Morris on Actel Fusion FPGA where built-in analog programmable properties fits particularly well for control applications such as Motor Control. Here are some highlights :

 ”Fusion has been around for awhile now, and it seems to be finding a unique groove in the industry. Applications such as smart motor control take advantage of the family’s particular combination of features and properties and provide solid economic justification for their design-in.  Happily, this kind of application is also directly in line with Actel’s power-centric mantra of the past couple of years.

On top of that, however, they are now pushing their devices into applications where much more than the power consumption of the FPGA is at stake.  Applications like system power management and motor control promise to save far more energy than just the difference in FPGA power consumption.  Since Actel’s devices occupy the lower density ranges (compared with the big SRAM FPGAs), they fit nicely into these types of applications.  You will often today see an Actel device doing the power management on a board that also boasts big Virtex or Stratix devices.”

“By including domain-specific IP, reference designs, and carefully-crafted development boards, many designers can get to a working application that does 90% of what they need without ever writing a line of HDL or messing with a single synthesis or place-and-route option.  For a design team whose mission may be something like “motor control” and whose expertise lies in areas like analog signal optimization, motor performance and efficiency, and software control algorithms - this can make the difference between designing in an FPGA and steering clear”

MotionFire Motor Control Platform on PowerWise Design TV

To learn more about the MotionFire control platform and general interest regarding FPGA-based motor control, here is an interesting web-TV program presented by National Semiconductor.

This program shows Jeff Wimett, Sr. App. Eng. at Altera, and Steve Herhusky, FAE at Arrow, discussing about advantages brought to motor control system designers by integrating FPGA devices in their medical or industrial applications. Among them is the ‘no-chip obsolescence’ advantage that is particularly interesting for applications that are planned to be operating in the field for at least 15 years and that need to benefit of continuous improvement - from motor control technology but also communication protocols technologies.

Horses and FPGAs

Kevin Morris’ most recent article of FPGA and Structured ASIC Journal makes a very humourous but interesting analogy between FPGA vs ASICs design battle and the battle that occured not so long ago between car cars vs horses as a mean of transportation :

The new BMW 5-series sedan outperforms the horse and buggy in every important way.  Your family will travel farther in a day and arrive less fatigued thanks to our superior cruising speed, climate-controlled cabin, and luxurious upholstery.  It’s so much easier to use as well - no more hitching up the team before you start, and no more watering, feeding, and grooming at the end of the day.  You just turn the key and drive away.  Simple as that. So, before you snap up that new stallion you’ve been eyeing - consider a car instead.”

Morris’ article gets interesting at the end where he points out that applications that can benefit from hardware programmability are subject to profound change :

FPGA companies are defending against this attack, of course, by equipping their devices with both hard- and soft-core processors so that they can reap the advantages of software programmability as well. The outcome of that game, however, will probably be determined by the existence of design requirements that mandate hardware programmability - features where software cannot deliver the performance or power efficiency required.  Designs with these sorts of requirements will remain in the sweet spot of FPGA, while general-purpose embedded platforms have a better-than-even chance of winning where software alone can do the job.”

This is obviously the case with power electronics applications.

FPGA-based embedded systems and economic slowdown : a solution that makes sense

The current economic slowdown challenges every business model what the following question: how can we do better at a lower cost and time to market ? The embedded system business is not different and also faces this challenge. As published in this article :

As the economic slowdown takes its toll on development budgets, embedded-system designers are turning to FPGA (field-programmable-gate-array) technology to shorten design cycles, combat obsolescence, and simplify product updates“.

To complete this article and to fully consider FPGA as a platform enabling costs reductions, one’s must also consider the IP ecology evolving around the FPGA platform, as discussed at the last Design&Reuse 2008 conference in Grenoble, France.

This notion of FPGA as a platform is completely in line with Xilinx CEO Moshe Gavrielov’s vision :

“”Xilinx believes they need to focus less on being a technology innovator in order to create market opportunities, but instead pursue a business platform leadership position. This strategy appears to make sense since the last couple years analysts have pondered why ASIC designs have not seen a mass migration to FPGAs as expected. Instead ASIC starts have migrated more to ASSP products. This creates a huge opportunity for platform FPGAs to take market share from mid to low volume ASSPs.”

The same idea as been repeated here and it seems that wind is currently turning in this direction :

FPGAs are displacing ASICs—a trend that in 2009 will be exacerbated by the global financial crisis—and now have a 30-to-one edge in design starts, according to market research firm Gartner Inc. “.

Embedded World 2009 : MotionFire & Falcon Eye FPGA-based Motor Control platforms to be demoed

If you plan to attend the next Embedded World conference in Germany, don’t miss the opportunity to take a look at MotionFire and Falcon Eye demos to be respectively presented at Sasco Holz and EBV stands.

A very special and interesting FPGA-based multi-axis motor control demo is going to be shown by EBV with its ‘Man/Women versus Machine’ competition robot football game.

Actel are also going to present a demo based on their Icicle kit which is described as a “miniature motor control and human machine interface“.

See you there !